general description the MAX3910 is a 10.7gbps transimpedance amplifier designed for sonet oc-192/sdh stm-64, dwdm, and 10gbps systems employing optical amplifiers. operating from a single +5v or -5.2v supply, it converts a photodiode current into a measurable differential vol- tage. this product has a linear gain for an input current up to 950? p-p , and a soft-limiting feature that provides an increasing output swing for an input current up to the 3.5ma p-p overload. an offset adjust circuit and out- put-level monitors allow for system threshold adjust- ment. additional features include back-terminated 50 ? outputs and an integrated 200 ? filter resistor to bias the photodiode. the MAX3910 has a small-signal bandwidth of 9.1ghz and a small-signal transimpedance of 1.65k ? . the part achieves an input sensitivity of 15.5? p-p for a ber of 10 -12 , translating to an optical sensitivity of 19.3dbm for a pin (r = 0.9, r e = 6.6) photo detector and 28.8dbm for an apd (m = 8, = 0.9, r e = 10) photo detector. the MAX3910 is fabricated in maxim? in-house sige process and is available in die form. applications dwdm systems oc-192/stm-64 transmission systems 10gbps systems using optical amplifiers 10gbps optical receivers features 950a p-p linear range 15.5a p-p sensitivity 3.5ma p-p overload 1.65k ? transimpedance 9.1ghz bandwidth 110ma supply current output offset adjustment soft-limiting beyond linear input range single +5v or -5.2v power supply esd protection MAX3910 10.7gbps linear transimpedance amplifier with output offset adjust ________________________________________________________________ maxim integrated products 1 ordering information in pin filt out+ out - r filt limiting amplifier v ee v ee v cc osadj mon+ mon- chf monin MAX3910 typical operating circuit 19-2434; rev 0; 7/02 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. part temp range pin-package MAX3910u/d 0 c to +85 c dice* * dice are designed to operate over a 0 c to +100? junction temperature (t j ) range, but are tested and guaranteed at t a = +25?.
MAX3910 10.7gbps linear transimpedance amplifier with output offset adjust 2 _______________________________________________________________________________________ absolute maximum ratings dc electrical characteristics (v cc - v ee = 4.75v to 5.5v, t j = 0 c to +100 c. typical values are at v ee = -5.2v, v cc = gnd, t a = +25 c, unless otherwise noted.) (notes 1, 2) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. power-supply voltage (v cc - v ee ) ........................-0.5v to +6.0v continuous input current (in)............................................4.2ma continuous input current (filt) ........................................9.8ma continuous output current (out+, out-) .........................35ma voltage at chf, filt, mon+, mon-, monin, osadj .................................(v ee - 0.5v) to the lower of +6.0v and (v cc + 0.5v) storage ambient temperature range (t stg ) ...-55 c to +150 c die attach temperature ..................................................+400 c operating temperature range (junction temperature range)......................-20 c to +120 c parameter symbol conditions min typ max units supply current i ee v ee 2 open (note 3), figure 1 95 138 ma supply current i ee v ee 2 connected to negative supply (note 3), figure 1 110 158 ma i in 450a p-p , f 1mhz 23 power-supply noise rejection psnr i in 450a p-p , f 10mhz (note 4) 22 db input bias voltage v ee + 0.95 v ee + 1.1 v i in 450a p-p 1.40 1.65 1.87 i in = 1.0ma p-p 1.37 transimpedance (note 5) z f i in = 2.0ma p-p 0.84 k ? linear input current range i lin (note 5) 450 950 a p-p chf open, i in 450a p-p 625 low-frequency cutoff chf = 0.1f, i in 450a p-p 0.5 khz photodiode filter resistor r filt 165 200 240 ? output monitor resistance to out+ or out- 10 k ? ? maximum differential output swing v od (note 6) 1.45 1.75 1.90 v p-p single-ended output range v os outputs dc-coupled to 50 ? to v cc (note 6) -1.3 0v i in = 7.5a dc -7 +7 output dc offset i in = 1.4ma dc -10 +10 mv osadj input resistance 15 20 k ? osadj input range v osadj -2.1 -0.4 v osadj voltage for zero offset -1.375 -1.25 -1.125 v minimum differential output offset v osadj = -0.4v, r l = 50 ? to v cc -320 -250 mv
MAX3910 10.7gbps linear transimpedance amplifier with output offset adjust _______________________________________________________________________________________ 3 dc electrical characteristics (continued) (v cc - v ee = 4.75v to 5.5v, t j = 0 c to +100 c. typical values are at v ee = -5.2v, v cc = gnd, t a = +25 c, unless otherwise noted.) (notes 1, 2) parameter symbol conditions min typ max units maximum output offset v osadj = -2.1v, r l = 50 ? to v cc 250 320 mv osadj voltage control factor: out+ ( ? v osadj )/ ? v out+ -3 -2 v/v osadj voltage control factor: out- ( ? v osadj )/ ? v out- 2 3 v/v ac electrical characteristics (v cc - v ee = 4.75v to 5.5v, t j = 0 c to +100 c. typical values are at v ee = -5.2v, v cc = gnd, t a = +25 c, unless otherwise noted.) (notes 1, 2) parameter symbol conditions min typ max units bandwidth bw 3db i in 450a p-p (notes 2, 11) 8.2 9.1 ghz input-referred noise i n (notes 2, 7) 1.1 1.62 a rms input sensitivity (notes 2, 8) 15.5 a p-p ac component (note 9) 2.5 3.5 ma p-p input overload i ol dc component (note 9) 1.4 1.8 ma gain flatness 100mhz - 4ghz, i in 450a p-p (note 2) 0.75 db gain ripple 4ghz - bw 3db , i in 450a p-p (note 2) 1.5 db i in 450a p-p 6.2 10.7 deterministic jitter (notes 2, 10) 450a p-p i in 2.5ma p-p 7.5 14.6 ps p-p single-ended output return loss (note 2) 7.5ghz 10 db note 1: default test conditions: v ee 2 and chf = open (see figure 1), r l = 50 ? to v cc , dc-coupled at each output, unless other- wise noted. ac characteristics are guaranteed by design and characterization. note 2: source capacitance = 0.25pf, source series resistance = 20 ? , and source series inductance = 0.6nh. output series inductance = 0.5nh at each of the differential outputs. note 3: supply current increases as average signal level increases. maximum supply current is specified for i in = 1.4ma average current. typical supply current is specified for i in 225a average current. note 4: psnr is measured by detecting the differential output voltage ? v out while applying ? v ee = 55mv p-p signal on v ee 1. psnr = 20log( ? v ee / ? v out ). output offset adjust feature disabled. note 5: transimpedance is defined as v out(p-p) / i in(p-p) at 10mhz. linear range is defined as the input signal level where the trans- impedance deviates from the small-signal transimpedance value by no more than 10%. see figure 2. note 6: input current 2.5ma p-p and 1.4ma dc. note 7: measured with a 4th-order bessel-thompson filter with a cutoff frequency of 8ghz. note 8: input sensitivity calculated from s/n 14.1 (ber 10 -12 ). note 9: for input signal less than or equal to the input overload, deterministic jitter is guaranteed to be within specifications. note 10: deterministic jitter is characterized with 2 7 - 1 prbs + eighty 0s + eighty 1s at 10.7gbps. note 11: bandwidth is measured in an electrical environment and corrected to match the conditions of note 2.
MAX3910 10.7gbps linear transimpedance amplifier with output offset adjust 4 _______________________________________________________________________________________ typical operating characteristics (v ee = -5.2v, v cc = gnd, t a = +25 c, unless otherwise noted.) supply current MAX3910 toc01 ambient temperature ( c) supply current (ma) 80 60 40 20 0 -20 -40 75 85 95 105 115 125 65 -60 100 1.4ma dc input v ee 2 = open 225 a dc input deterministic jitter MAX3910 toc02 ambient temperature ( c) deterministic jitter (ps p-p ) 80 70 60 50 40 30 20 10 6 7 8 9 10 11 5 090 2.5ma p-p input 450 a p-p input linear range input current ( a p-p ) differential output (mv p-p ) 2000 1500 1000 500 200 400 600 800 1000 1200 1400 1600 1800 0 0 2500 end of linear range MAX3910 toc03 power-supply noise rejection MAX3910 toc04 frequency (mhz) power-supply noise rejection (db) 9 8 7 6 5 4 3 2 1 30 25 20 15 10 5 0 35 010 input-referred noise MAX3910 toc05 ambient temperature ( c) input-refered noise ( a rms ) 80 60 20 40 -20 0 -40 0.95 1.00 1.05 1.10 1.15 1.20 1.25 1.30 1.35 1.40 0.90 -60 100 transimpedance MAX3910 toc06 input current ( a p-p ) transimpedance (k ? ) 2000 1500 1000 500 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 0 0 2500 offset adjust circuit v osadj (v) output dc offset (mv) -0.65 -1.85 -1.05 -1.55 -300 -200 -100 0 100 200 300 400 -400 -2.25 -0.25 MAX3910 toc07
MAX3910 10.7gbps linear transimpedance amplifier with output offset adjust _______________________________________________________________________________________ 5 electrical eye diagram (150 a p-p input) 13ps/div MAX3910 toc08 electrical eye diagram (1ma p-p input) 13ps/div MAX3910 toc09 pad description typical operating characteristics (continued) (v ee = -5.2v, v cc = gnd, t a = +25 c, unless otherwise noted.) electrical eye diagram (2.5ma p-p input) 13ps/div MAX3910 toc10 pad name function 1, 8 16, 31, 32, 33 v ee 1 main negative power-supply voltage* 2 monin monitor output providing replica current from dc offset loop. internally connected to v cc through 1k ? resistor. 3, 4, 7 n.c. no connection 5 in signal input. connected to photodiode anode. 6 filt on-chip resistor for photodiode biasing. internally connected to v cc through a 200 ? resistor. 17 v ee 2 separate power supply for output offset adjustment. leave open to disable this feature. offset adjust feature must be disabled for ac-coupled load.* 18, 19, 21, 23, 24, 26, 30 v cc positive power-supply voltage* 20 out- inverted data output with 50 ? back termination 22 out+ noninverted data output with 50 ? back termination 25 chf connect a capacitor to ground to increase the on-chip dc-cancellation loop time constant. 27 mon- monitors dc voltage at out-. internally connected to out- through a 10k ? resistor. 28 mon+ monitors dc voltage at out+. internally connected to out+ through a 10k ? resistor. 29 osadj dc offset control. voltage at this pad sets the output dc offset when the offset adjust feature is enabled. (see figure 3.) * the MAX3910 can operate with a positive supply (v ee = gnd) or a negative supply (v cc = gnd). 4.75v (v cc - v ee ) 5.5v.
MAX3910 detailed description figure 1 is a functional diagram of the MAX3910 linear transimpedance amplifier. it comprises a transimped- ance amplifier stage, a gain stage, an output buffer, and a dc-cancellation circuit. an output offset adjust circuit is implemented to perform threshold adjust for systems using optical amplifiers. transimpedance amplifier the photodiode current flows into the summing node of a high-gain amplifier and a shunt feedback resistor. a dc-cancellation circuit removes the average current, and the ac component is linearly converted into a vol- tage over a wide input range. dc-cancellation loop the dc-cancellation circuit uses low-frequency feed- back to remove the dc component of the input signal. this feature centers the input signal within the transim- pedance amplifier s linear range, thereby reducing pulse-width distortion (pwd) on large input signals. the dc-cancellation circuit has a built-in capacitor to achieve a low-frequency cutoff of 25khz, and an external capaci- tor bonded between chf and v cc can be used to fur- ther reduce the cutoff frequency. this circuit minimizes pwd for data sequences that exhibit a 50% duty cycle and mark density. a duty cycle or mark density signifi- cantly different from 50% causes the MAX3910 to gener- ate pwd. voltage amplifier the single-ended signal from the transimpedance amplifier stage is converted to a differential signal and further amplified. output buffer in addition to having a wide linear range, the MAX3910 has a soft-limiting feature. for inputs less than 950a p-p , the MAX3910 operates linearly. beyond this range, a soft-limiting feature is implemented so that the differen- tial output swing is proportional to the input current, as shown in figure 2. the output buffer is back-terminated with 50 ? on-chip resistors and can drive either a dc- coupled 50 ? load to v cc , or a 50 ? ac-coupled load. 10.7gbps linear transimpedance amplifier with output offset adjust 6 _______________________________________________________________________________________ MAX3910 v ee 1 v cc pin in filt 200 ? v ee 1 monin ref dc-cancellation loop and control chf v ee 1 v ee 2v ee 1 v cc 50 ? 50 ? tia -1.25v 1.6pf g m v cc 30k ? 10k ? 10k ? 90k ? 1.2k ? osadj mon- mon+ out- out+ v cc v cc r l = 50 ? r l = 50 ? figure 1. functional diagram
offset adjust circuit connecting v ee 2 to the negative supply enables the offset adjust circuit. the circuit compares the external voltage applied to the osadj pad to an internal (v cc - 1.25v) reference to introduce a dc offset at the differ- ential outputs (figure 3). this function is useful in sys- tems that need threshold adjust. for ac-coupled loads, the circuit must be disabled. the input network of the offset adjust circuit creates a lowpass filter with a cutoff frequency of approximately 85mhz. if the pad is left unconnected, an internal vol- tage-divider sets the voltage at the pad to (v cc - 1.25v). the input impedance is approximately 20k ? . monin pad the voltage at monin (v monin ) serves as a received signal strength indicator (rssi). the transimpedance gain of the average input current (i inave ) to v monin is typically: design procedure power supply the MAX3910 requires wideband power-supply decou- pling. power-supply bypassing should provide low impedance between v ee 1 and v cc for frequencies up to 10ghz. if the offset-adjust circuit is enabled, it is recom- mended that the same filtering be applied to v ee 2. photodiode filter supply-voltage noise at the cathode of the photodiode produces a noise current i = c pd ? v/ ? t, which reduces the receiver sensitivity (c pd is the photodiode capaci- tance). the MAX3910 contains an internal 200 ? resis- tor between the filt pad and v cc . combining this resistor with an external capacitor connected between the filt pad and v ee 1 creates a lowpass filter, which reduces photodiode noise current and improves recei- ver sensitivity. current generated by supply-noise vol- tage is divided between the external capacitance and the photodiode capacitance. assuming the filter capa- citance is much larger than the photodiode capaci- tance, the input noise current due to supply noise is: where c filt is the external capacitance. if the amount of tolerable noise is known, the filter capacitance can be selected easily. wire bonding for high-current density and reliable operation, the MAX3910 uses gold metalization. connections to the die should be made with gold wire only. aluminum bonding is not recommended. die thickness is typically 8mils. bondwire inductance between the photodiode and the in pad can be optimized to obtain best perfor- mance. higher inductance improves bandwidth, while lower bondwire inductance reduces time domain ring- ing. bondwires on all other pads should be kept as short as possible to optimize performance. the back- side of the MAX3910 die is fully insulated and can be connected to v cc or v ee . i vc rc noise noise pd filt filt = ? ? = v i va monin inave 1000( / ) MAX3910 10.7gbps linear transimpedance amplifier with output offset adjust _______________________________________________________________________________________ 7 linear range input current ( a p-p ) differential output (mv p-p ) 2000 1500 1000 500 200 400 600 800 1000 1200 1400 1600 1800 0 0 2500 end of linear range MAX3910 toc03 figure 2. linear range of the MAX3910 offset adjust circuit v osadj (v) output dc offset (mv) -0.65 -1.85 -1.05 -1.55 -300 -200 -100 0 100 200 300 400 -400 -2.25 -0.25 figure 3. plot of offset adjust circuit behavior
MAX3910 input capacitance noise and bandwidth are adversely affected by capaci- tance on the MAX3910 s input node. use any tech- niques available to minimize input capacitance. output-coupling capacitors the outputs of the MAX3910 can be ac- or dc-coupled. for more information on selecting ac-coupling capaci- tors, visit maxim s website and follow the links to hfan- 01.1: choosing ac-coupling capacitors . applications information optical power relations many MAX3910 specifications relate to the input signal amplitude. when working with fiber optic receivers, the input sometimes is expressed in terms of average opti- cal power and extinction ratio. optical power relations are shown in table 1 for an average mark density of 50% and an average duty cycle of 50%. optical sensitivity calculation the MAX3910 input-referred rms noise current (i n ) generally determines the receiver sensitivity. to obtain a system bit-error rate of 10 -12 , the signal-to-noise ratio must be 14.1 or better. the input sensitivity, expressed in average power, can be estimated as: where is the photodiode responsivity in a/w and i n is measured in amperes. input optical overload the overload is the largest input that the MAX3910 accepts while meeting specifications. optical overload can be estimated in terms of average power with the following equation: where i ol (ma p-p ) is the dc overload for the MAX3910. optical linear range the MAX3910 has high gain and operates in a linear range for inputs not exceeding: where i lin (ma p-p ) is the peak-to-peak linear range. linear range ir r dbm lin e e = + ? ? ? ? ? ? ? 10 1 21 log () () overload ir r dbm ol e e = + ? ? ? ? ? ? ? 10 1 21 log () () sensitivity ir r dbm ne e = + ? ? ? ? ? ? ? 10 14 1 1 21 1000 log .() () 10.7gbps linear transimpedance amplifier with output offset adjust 8 _______________________________________________________________________________________ parameter symbol pin-package average p avg p avg = (p0 + p1) / 2 extinction r e r e = p1 / p0 optical power of a 1 p1 p1 = 2p avg optical power of a 0 p0 p0 = 2p avg / (r e + 1) optical modulation amplitude p in p in = p1 - p0 = 2p avg table 1. optical power relations* * assuming a 50% average mark density. p 0 p 1 p avg p in optical power time figure 4. optical power relations r r e e + 1 r r e e ? + 1 1
MAX3910 10.7gbps linear transimpedance amplifier with output offset adjust maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 _____________________ 9 ? 2002 maxim integrated products printed usa is a registered trademark of maxim integrated products. pad coordinates coordinates (m) pad name xy 1v ee 1 38 1259 2 monin 43 1034 3 n.c. 43 908 4 n.c. 43 782 5 in 43 656 6 filt 43 530 7 n.c. 50 282 8v ee 147 47 9v ee 1 173 47 10 v ee 1 299 47 11 v ee 1 425 47 12 v ee 1 551 47 13 v ee 1 677 47 14 v ee 1 803 47 15 v ee 1 929 47 16 v ee 1 1055 47 17 v ee 1 1181 47 18 v cc 1255 267 19 v cc 1255 393 20 out- 1255 519 21 v cc 1255 645 22 out+ 1255 771 23 v cc 1255 897 24 v cc 1255 1055 25 chf 1172 1259 26 v cc 1046 1259 27 mon- 920 1259 28 mon+ 794 1259 29 osadj 668 1259 30 v cc 542 1259 31 v ee 1 416 1259 32 v ee 1 290 1259 33 v ee 1 164 1259 coordinates are in ? from the lower left corner of the circuit die to the center of the pad. for more information, refer to hfan-08.0.1 : understanding bonding coordinates and physical die size . chip information transistor count: 1291 process: bipolar sige, soi die size: 1.6mm ? 1.6mm v cc (24) n.c. (3) 63mil (1.6mm) 63mil (1.6mm) v cc (23) out+ (22) v cc (21) out- (20) v cc (19) v cc (18) v ee 1 (8) v ee 1 (9) v ee 1 (10) v ee 1(11) v ee 1 (12) v ee 1 (13) v ee 1 (14) v ee 1 (15) v ee 1 (16) v ee 2 (17) v ee 1 (33) v ee 1 (32) v ee 1 (31) v cc (30) osadj (29) mon+ (28) mon- (27) v cc (26) chf (25) monin (2) v ee 1 (1) filt (6) n.c. (7) center of pad (47 m, 47 m) in (5) n.c. (4)
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